Integrated circuit (IC) devices with positive and negative supply, IC devices with separate circuit parts biased from first and second supplies, respectively, that have a common reference, or circuits with a supply voltage higher than a maximum permissible gate-to-source voltage of a MOS transistor within the device, typically need a signal level shifter circuit communicating an input signal received at an input of one of the first and second circuit parts to an output of the other circuit part. In the present disclosure, assuming the case of a first supply with a Ground terminal referred to as “GND” and a supply terminal referred to as VCC (a usual convention in IC circuits), and a second supply also with a Ground terminal “GND” and a supply terminal “VCC”, the second supply being referenced to the GND terminal of the first supply and having a voltage level higher than the voltage level of the first supply, the lower supply has supply terminals referred to as GND_LOW and VCC_LOW, and the upper supply has supply terminals referred to as GND_UPP and VCC_UPP. In a configuration with positive and negative supplies that have a common GND terminal, similar designations would be used mutatis mutandis.
A signal level shifter should transfer a ground-referenced DC signal to a DC signal referenced to the VCC terminal, a VCC referenced DC signal to a Ground referenced DC signal, or a DC signal referenced to any terminal of a first supply to a DC signal referenced to any terminal of a second supply. Standard DC signal level shifters in integrated MOS, CMOS or BiCMOS circuits have a relatively high propagation delay, especially when cascode stages are needed for blocking excessive voltages between circuit parts or circuit components.